[intelxl] Allow for arbitrary placement of interrupt control register

Signed-off-by: Michael Brown <mcb30@ipxe.org>
ipxe · Apr 27, 2019 · 1e0342e · 1e0342e
1 parent 2dbd9c0
commit 1e0342e
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Showing 2 changed files with 11 additions and 12 deletions.
diff --git a/src/drivers/net/intelxl.c b/src/drivers/net/intelxl.c
@@ -1509,9 +1509,9 @@ static void intelxl_poll ( struct net_device *netdev ) {
 
 	/* Acknowledge interrupts, if applicable */
 	if ( netdev_irq_enabled ( netdev ) ) {
-		writel ( ( INTELXL_PFINT_DYN_CTL0_CLEARPBA |
-			   INTELXL_PFINT_DYN_CTL0_INTENA_MASK ),
-			 intelxl->regs + INTELXL_PFINT_DYN_CTL0 );
+		writel ( ( INTELXL_INT_DYN_CTL_CLEARPBA |
+			   INTELXL_INT_DYN_CTL_INTENA_MASK ),
+			 ( intelxl->regs + intelxl->intr ) );
 	}
 
 	/* Poll for completed packets */
@@ -1536,12 +1536,8 @@ static void intelxl_poll ( struct net_device *netdev ) {
 static void intelxl_irq ( struct net_device *netdev, int enable ) {
 	struct intelxl_nic *intelxl = netdev->priv;
 
-	if ( enable ) {
-		writel ( INTELXL_PFINT_DYN_CTL0_INTENA,
-			 intelxl->regs + INTELXL_PFINT_DYN_CTL0 );
-	} else {
-		writel ( 0, intelxl->regs + INTELXL_PFINT_DYN_CTL0 );
-	}
+	writel ( ( enable ? INTELXL_INT_DYN_CTL_INTENA : 0 ),
+		 ( intelxl->regs + intelxl->intr ) );
 }
 
 /** Network device operations */
@@ -1585,6 +1581,7 @@ static int intelxl_probe ( struct pci_device *pci ) {
 	netdev->dev = &pci->dev;
 	memset ( intelxl, 0, sizeof ( *intelxl ) );
 	intelxl->pf = PCI_FUNC ( pci->busdevfn );
+	intelxl->intr = INTELXL_PFINT_DYN_CTL0;
 	intelxl_init_admin ( &intelxl->command, INTELXL_ADMIN_CMD,
 			     &intelxl_admin_offsets );
 	intelxl_init_admin ( &intelxl->event, INTELXL_ADMIN_EVT,

diff --git a/src/drivers/net/intelxl.h b/src/drivers/net/intelxl.h
@@ -735,9 +735,9 @@ intelxl_init_ring ( struct intelxl_ring *ring, unsigned int count, size_t len,
 
 /** PF Interrupt Zero Dynamic Control Register */
 #define INTELXL_PFINT_DYN_CTL0 0x038480
-#define INTELXL_PFINT_DYN_CTL0_INTENA	0x00000001UL	/**< Enable */
-#define INTELXL_PFINT_DYN_CTL0_CLEARPBA	0x00000002UL	/**< Acknowledge */
-#define INTELXL_PFINT_DYN_CTL0_INTENA_MASK 0x80000000UL	/**< Ignore enable */
+#define INTELXL_INT_DYN_CTL_INTENA	0x00000001UL	/**< Enable */
+#define INTELXL_INT_DYN_CTL_CLEARPBA	0x00000002UL	/**< Acknowledge */
+#define INTELXL_INT_DYN_CTL_INTENA_MASK 0x80000000UL	/**< Ignore enable */
 
 /** PF Interrupt Zero Linked List Register */
 #define INTELXL_PFINT_LNKLST0 0x038500
@@ -835,6 +835,8 @@ struct intelxl_nic {
 	unsigned int vsi;
 	/** Queue set handle */
 	unsigned int qset;
+	/** Interrupt control register */
+	unsigned int intr;
 
 	/** Admin command queue */
 	struct intelxl_admin command;