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[ethernet] Update mii.h and use it in drivers that had a private copy
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Signed-off-by: Michael Brown <mcb30@etherboot.org>
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danielverkamp authored and Michael Brown committed May 26, 2009
1 parent 005fce0 commit b8469ed
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Showing 13 changed files with 127 additions and 535 deletions.
1 change: 1 addition & 0 deletions src/drivers/net/bnx2.c
Expand Up @@ -20,6 +20,7 @@ FILE_LICENCE ( GPL_ANY );
#include <gpxe/pci.h>
#include <gpxe/ethernet.h>
#include "string.h"
#include <mii.h>
#include "bnx2.h"
#include "bnx2_fw.h"

Expand Down
107 changes: 0 additions & 107 deletions src/drivers/net/bnx2.h
Expand Up @@ -92,113 +92,6 @@ typedef int pci_power_t;
#define WAKE_MAGIC (1 << 5)
#define WAKE_MAGICSECURE (1 << 6) /* only meaningful if WAKE_MAGIC */

/* Generic MII registers. */

#define MII_BMCR 0x00 /* Basic mode control register */
#define MII_BMSR 0x01 /* Basic mode status register */
#define MII_PHYSID1 0x02 /* PHYS ID 1 */
#define MII_PHYSID2 0x03 /* PHYS ID 2 */
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
#define MII_LPA 0x05 /* Link partner ability reg */
#define MII_EXPANSION 0x06 /* Expansion register */
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
#define MII_RERRCOUNTER 0x15 /* Receive error counter */
#define MII_SREVISION 0x16 /* Silicon revision */
#define MII_RESV1 0x17 /* Reserved... */
#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
#define MII_PHYADDR 0x19 /* PHY address */
#define MII_RESV2 0x1a /* Reserved... */
#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
#define MII_NCONFIG 0x1c /* Network interface config */

/* Basic mode control register. */
#define BMCR_RESV 0x007f /* Unused... */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /* Collision test */
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
#define BMCR_RESET 0x8000 /* Reset the DP83840 */

/* Basic mode status register. */
#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
#define BMSR_JCD 0x0002 /* Jabber detected */
#define BMSR_LSTATUS 0x0004 /* Link status */
#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
#define BMSR_RESV 0x07c0 /* Unused... */
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */

/* Advertisement control register. */
#define ADVERTISE_SLCT 0x001f /* Selector bits */
#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
#define ADVERTISE_RESV 0x1c00 /* Unused... */
#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */

#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)

/* Link partner ability register. */
#define LPA_SLCT 0x001f /* Same as advertise selector */
#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
#define LPA_RESV 0x1c00 /* Unused... */
#define LPA_RFAULT 0x2000 /* Link partner faulted */
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */

#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)

/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /* Unused... */

/* 1000BASE-T Control register */
#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */

/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /* Unused... */
#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
#define NWAYTEST_RESV2 0xfe00 /* Unused... */

/* The following are all involved in forcing a particular link
* * mode for the device for setting things. When getting the
* * devices settings, these indicate the current mode and whether
Expand Down
83 changes: 34 additions & 49 deletions src/drivers/net/etherfabric.c
Expand Up @@ -32,6 +32,7 @@ FILE_LICENCE ( GPL_ANY );
#include <gpxe/iobuf.h>
#include <gpxe/netdevice.h>
#include <gpxe/timer.h>
#include <mii.h>
#include "etherfabric.h"
#include "etherfabric_nic.h"

Expand Down Expand Up @@ -84,39 +85,23 @@ static void falcon_mdio_write (struct efab_nic *efab, int device,
static int falcon_mdio_read ( struct efab_nic *efab, int device, int location );

/* GMII registers */
#define MII_BMSR 0x01 /* Basic mode status register */
#define MII_ADVERTISE 0x04 /* Advertisement control register */
#define MII_LPA 0x05 /* Link partner ability register*/
#define GMII_GTCR 0x09 /* 1000BASE-T control register */
#define GMII_GTSR 0x0a /* 1000BASE-T status register */
#define GMII_PSSR 0x11 /* PHY-specific status register */

/* Basic mode status register. */
#define BMSR_LSTATUS 0x0004 /* Link status */

/* Link partner ability register. */
#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
#define LPA_PAUSE 0x0400 /* Bit 10 - MAC pause */

/* Pseudo extensions to the link partner ability register */
#define LPA_1000FULL 0x00020000
#define LPA_1000HALF 0x00010000
#define LPA_10000FULL 0x00040000
#define LPA_10000HALF 0x00080000
#define LPA_EF_1000FULL 0x00020000
#define LPA_EF_1000HALF 0x00010000
#define LPA_EF_10000FULL 0x00040000
#define LPA_EF_10000HALF 0x00080000

#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
#define LPA_1000 ( LPA_1000FULL | LPA_1000HALF )
#define LPA_10000 ( LPA_10000FULL | LPA_10000HALF )
#define LPA_DUPLEX ( LPA_10FULL | LPA_100FULL | LPA_1000FULL | \
LPA_10000FULL )
#define LPA_EF_1000 ( LPA_EF_1000FULL | LPA_EF_1000HALF )
#define LPA_EF_10000 ( LPA_EF_10000FULL | LPA_EF_10000HALF )
#define LPA_EF_DUPLEX ( LPA_10FULL | LPA_100FULL | LPA_EF_1000FULL | \
LPA_EF_10000FULL )

/* Mask of bits not associated with speed or duplexity. */
#define LPA_OTHER ~( LPA_10FULL | LPA_10HALF | LPA_100FULL | \
LPA_100HALF | LPA_1000FULL | LPA_1000HALF )
LPA_100HALF | LPA_EF_1000FULL | LPA_EF_1000HALF )

/* PHY-specific status register */
#define PSSR_LSTATUS 0x0400 /* Bit 10 - link status */
Expand All @@ -131,9 +116,9 @@ gmii_autoneg_advertised ( struct efab_nic *efab )
unsigned int mii_advertise;
unsigned int gmii_advertise;

/* Extended bits are in bits 8 and 9 of GMII_GTCR */
/* Extended bits are in bits 8 and 9 of MII_CTRL1000 */
mii_advertise = falcon_mdio_read ( efab, 0, MII_ADVERTISE );
gmii_advertise = ( ( falcon_mdio_read ( efab, 0, GMII_GTCR ) >> 8 )
gmii_advertise = ( ( falcon_mdio_read ( efab, 0, MII_CTRL1000 ) >> 8 )
& 0x03 );
return ( ( gmii_advertise << 16 ) | mii_advertise );
}
Expand All @@ -148,9 +133,9 @@ gmii_autoneg_lpa ( struct efab_nic *efab )
unsigned int mii_lpa;
unsigned int gmii_lpa;

/* Extended bits are in bits 10 and 11 of GMII_GTSR */
/* Extended bits are in bits 10 and 11 of MII_STAT1000 */
mii_lpa = falcon_mdio_read ( efab, 0, MII_LPA );
gmii_lpa = ( falcon_mdio_read ( efab, 0, GMII_GTSR ) >> 10 ) & 0x03;
gmii_lpa = ( falcon_mdio_read ( efab, 0, MII_STAT1000 ) >> 10 ) & 0x03;
return ( ( gmii_lpa << 16 ) | mii_lpa );
}

Expand All @@ -166,10 +151,10 @@ gmii_nway_result ( unsigned int negotiated )
/* Mask out the speed and duplexity bits */
other_bits = negotiated & LPA_OTHER;

if ( negotiated & LPA_1000FULL )
return ( other_bits | LPA_1000FULL );
else if ( negotiated & LPA_1000HALF )
return ( other_bits | LPA_1000HALF );
if ( negotiated & LPA_EF_1000FULL )
return ( other_bits | LPA_EF_1000FULL );
else if ( negotiated & LPA_EF_1000HALF )
return ( other_bits | LPA_EF_1000HALF );
else if ( negotiated & LPA_100FULL )
return ( other_bits | LPA_100FULL );
else if ( negotiated & LPA_100BASE4 )
Expand Down Expand Up @@ -1740,9 +1725,9 @@ falcon_reconfigure_mac_wrapper ( struct efab_nic *efab )
efab_oword_t reg;
int link_speed;

if ( efab->link_options & LPA_10000 ) {
if ( efab->link_options & LPA_EF_10000 ) {
link_speed = 0x3;
} else if ( efab->link_options & LPA_1000 ) {
} else if ( efab->link_options & LPA_EF_1000 ) {
link_speed = 0x2;
} else if ( efab->link_options & LPA_100 ) {
link_speed = 0x1;
Expand Down Expand Up @@ -1951,8 +1936,8 @@ mentormac_init ( struct efab_nic *efab )
efab_dword_t reg;

/* Configuration register 1 */
pause = ( efab->link_options & LPA_PAUSE ) ? 1 : 0;
if ( ! ( efab->link_options & LPA_DUPLEX ) ) {
pause = ( efab->link_options & LPA_PAUSE_CAP ) ? 1 : 0;
if ( ! ( efab->link_options & LPA_EF_DUPLEX ) ) {
/* Half-duplex operation requires TX flow control */
pause = 1;
}
Expand All @@ -1965,8 +1950,8 @@ mentormac_init ( struct efab_nic *efab )
udelay ( 10 );

/* Configuration register 2 */
if_mode = ( efab->link_options & LPA_1000 ) ? 2 : 1;
full_duplex = ( efab->link_options & LPA_DUPLEX ) ? 1 : 0;
if_mode = ( efab->link_options & LPA_EF_1000 ) ? 2 : 1;
full_duplex = ( efab->link_options & LPA_EF_DUPLEX ) ? 1 : 0;
EFAB_POPULATE_DWORD_4 ( reg,
GM_IF_MODE, if_mode,
GM_PAD_CRC_EN, 1,
Expand Down Expand Up @@ -2018,8 +2003,8 @@ mentormac_init ( struct efab_nic *efab )
udelay ( 10 );

/* FIFO configuration register 5 */
bytemode = ( efab->link_options & LPA_1000 ) ? 1 : 0;
half_duplex = ( efab->link_options & LPA_DUPLEX ) ? 0 : 1;
bytemode = ( efab->link_options & LPA_EF_1000 ) ? 1 : 0;
half_duplex = ( efab->link_options & LPA_EF_DUPLEX ) ? 0 : 1;
falcon_gmac_readl ( efab, &reg, GMF_CFG5_REG_MAC );
EFAB_SET_DWORD_FIELD ( reg, GMF_CFGBYTMODE, bytemode );
EFAB_SET_DWORD_FIELD ( reg, GMF_CFGHDPLX, half_duplex );
Expand Down Expand Up @@ -2415,7 +2400,7 @@ static int
falcon_xaui_phy_init ( struct efab_nic *efab )
{
/* CX4 is always 10000FD only */
efab->link_options = LPA_10000FULL;
efab->link_options = LPA_EF_10000FULL;

/* There is no PHY! */
return 0;
Expand Down Expand Up @@ -2480,7 +2465,7 @@ falcon_xfp_phy_init ( struct efab_nic *efab )
int rc;

/* Optical link is always 10000FD only */
efab->link_options = LPA_10000FULL;
efab->link_options = LPA_EF_10000FULL;

/* Reset the PHY */
rc = mdio_clause45_reset_mmd ( efab, MDIO_MMD_PHYXS );
Expand Down Expand Up @@ -2567,7 +2552,7 @@ falcon_txc_phy_init ( struct efab_nic *efab )
int rc;

/* CX4 is always 10000FD only */
efab->link_options = LPA_10000FULL;
efab->link_options = LPA_EF_10000FULL;

/* reset the phy */
rc = mdio_clause45_reset_mmd ( efab, MDIO_MMD_PMAPMD );
Expand Down Expand Up @@ -2685,7 +2670,7 @@ falcon_tenxpress_phy_init ( struct efab_nic *efab )
int rc, reg;

/* 10XPRESS is always 10000FD (at the moment) */
efab->link_options = LPA_10000FULL;
efab->link_options = LPA_EF_10000FULL;

/* Wait for the blocks to come out of reset */
rc = mdio_clause45_wait_reset_mmds ( efab );
Expand Down Expand Up @@ -2765,7 +2750,7 @@ falcon_pm8358_phy_init ( struct efab_nic *efab )
int rc, reg, i;

/* This is a XAUI retimer part */
efab->link_options = LPA_10000FULL;
efab->link_options = LPA_EF_10000FULL;

rc = mdio_clause45_reset_mmd ( efab, MDIO_MMDREG_DEVS0_DTEXS );
if ( rc )
Expand Down Expand Up @@ -4039,10 +4024,10 @@ efab_init_mac ( struct efab_nic *efab )
}

EFAB_LOG ( "\n%dMbps %s-duplex\n",
( efab->link_options & LPA_10000 ? 10000 :
( efab->link_options & LPA_1000 ? 1000 :
( efab->link_options & LPA_EF_10000 ? 10000 :
( efab->link_options & LPA_EF_1000 ? 1000 :
( efab->link_options & LPA_100 ? 100 : 10 ) ) ),
( efab->link_options & LPA_DUPLEX ?
( efab->link_options & LPA_EF_DUPLEX ?
"full" : "half" ) );

/* TODO: Move link state handling to the poll() routine */
Expand Down
35 changes: 4 additions & 31 deletions src/drivers/net/forcedeth.c
Expand Up @@ -373,13 +373,6 @@ enum {
#define PHY_1000 0x2
#define PHY_HALF 0x100

/* FIXME: MII defines that should be added to <linux/mii.h> */
#define MII_1000BT_CR 0x09
#define MII_1000BT_SR 0x0a
#define ADVERTISE_1000FULL 0x0200
#define ADVERTISE_1000HALF 0x0100
#define LPA_1000FULL 0x0800
#define LPA_1000HALF 0x0400

/* Bit to know if MAC addr is stored in correct order */
#define MAC_ADDR_CORRECT 0x01
Expand Down Expand Up @@ -465,26 +458,6 @@ static int reg_delay(int offset, u32 mask,
}

#define MII_READ (-1)
#define MII_PHYSID1 0x02 /* PHYS ID 1 */
#define MII_PHYSID2 0x03 /* PHYS ID 2 */
#define MII_BMCR 0x00 /* Basic mode control register */
#define MII_BMSR 0x01 /* Basic mode status register */
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
#define MII_LPA 0x05 /* Link partner ability reg */

#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */

/* Link partner ability register. */
#define LPA_SLCT 0x001f /* Same as advertise selector */
#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
#define LPA_RESV 0x1c00 /* Unused... */
#define LPA_RFAULT 0x2000 /* Link partner faulted */
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */

/* mii_rw: read/write a register on the PHY.
*
Expand Down Expand Up @@ -586,15 +559,15 @@ static int phy_init(struct nic *nic)
if (mii_status & PHY_GIGABIT) {
np->gigabit = PHY_GIGABIT;
mii_control_1000 =
mii_rw(nic, np->phyaddr, MII_1000BT_CR, MII_READ);
mii_rw(nic, np->phyaddr, MII_CTRL1000, MII_READ);
mii_control_1000 &= ~ADVERTISE_1000HALF;
if (phyinterface & PHY_RGMII)
mii_control_1000 |= ADVERTISE_1000FULL;
else
mii_control_1000 &= ~ADVERTISE_1000FULL;

if (mii_rw
(nic, np->phyaddr, MII_1000BT_CR, mii_control_1000)) {
(nic, np->phyaddr, MII_CTRL1000, mii_control_1000)) {
printf("phy init failed.\n");
return PHY_ERROR;
}
Expand Down Expand Up @@ -788,9 +761,9 @@ static int update_linkspeed(struct nic *nic)
retval = 1;
if (np->gigabit == PHY_GIGABIT) {
control_1000 =
mii_rw(nic, np->phyaddr, MII_1000BT_CR, MII_READ);
mii_rw(nic, np->phyaddr, MII_CTRL1000, MII_READ);
status_1000 =
mii_rw(nic, np->phyaddr, MII_1000BT_SR, MII_READ);
mii_rw(nic, np->phyaddr, MII_STAT1000, MII_READ);

if ((control_1000 & ADVERTISE_1000FULL) &&
(status_1000 & LPA_1000FULL)) {
Expand Down

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