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[GDB] Zero-extend 16-bit segment registers
When the 16-bit segment registers are accessed using 32-bit instructions
the high order bytes are undefined on older CPUs.  We now explicitly
zero the high order bytes when snapshotting the CPU state.  This ensures
that the GDB stub reports consistent values for the segment registers.
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stefanha authored and Michael Brown committed Jun 30, 2008
1 parent 5504fa9 commit 3715c8c
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Showing 2 changed files with 14 additions and 8 deletions.
18 changes: 12 additions & 6 deletions src/arch/i386/core/gdbidt.S
Expand Up @@ -163,12 +163,18 @@ int_page_fault:
#define IH_OFFSET_FLUX_END ( IH_OFFSET_END - 20 )
do_interrupt:
/* Store CPU state in GDB register snapshot */
pushl %gs
pushl %fs
pushl %es
pushl %ds
pushl %ss
pushl IH_OFFSET_FLUX_OLD_CS(%esp)
pushw $0
pushw %gs
pushw $0
pushw %fs
pushw $0
pushw %es
pushw $0
pushw %ds
pushw $0
pushw %ss
pushw $0
pushw IH_OFFSET_FLUX_OLD_CS + 2(%esp)
pushl IH_OFFSET_FLUX_OLD_EFLAGS(%esp)
pushl IH_OFFSET_FLUX_OLD_EIP(%esp)
pushl %edi
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4 changes: 2 additions & 2 deletions src/tests/gdbstub_test.gdb
Expand Up @@ -81,13 +81,13 @@ define gpxe_test_awatch
awatch watch_me

c
gpxe_assert $ecx 0x600d0000 "gpxe_test_awatch"
gpxe_assert $ecx 0x600d0000 "gpxe_test_awatch read"
if $ecx == 0x600d0000
c
end

c
gpxe_assert $ecx 0x600d0001 "gpxe_test_awatch"
gpxe_assert $ecx 0x600d0001 "gpxe_test_awatch write"
if $ecx == 0x600d0001
c
end
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