[arm] Add support for 32-bit ARM

Signed-off-by: Michael Brown <mcb30@ipxe.org>

src/arch/arm/Makefile

@@ -0,0 +1,25 @@
+# Assembler section type character
+#
+ASM_TCHAR	:= %
+ASM_TCHAR_OPS	:= %%
+
+# ARM-specific directories containing source files
+#
+SRCDIRS		+= arch/arm/core
+SRCDIRS		+= arch/arm/libgcc
+SRCDIRS		+= arch/arm/interface/efi
+
+# ARM-specific flags
+#
+CFLAGS		+= -mthumb -mcpu=cortex-a15 -mabi=aapcs -mfloat-abi=soft
+CFLAGS		+= -mword-relocations
+ASFLAGS		+= -mthumb -mcpu=cortex-a15
+
+# EFI requires -fshort-wchar, and nothing else currently uses wchar_t
+#
+CFLAGS		+= -fshort-wchar
+
+# Include platform-specific Makefile
+#
+MAKEDEPS	+= arch/arm/Makefile.$(PLATFORM)
+include arch/arm/Makefile.$(PLATFORM)

src/arch/arm/Makefile.efi

@@ -0,0 +1,14 @@
+# -*- makefile -*- : Force emacs to use Makefile mode
+
+# Specify EFI image builder
+#
+ELF2EFI		= $(ELF2EFI32)
+
+# Specify EFI boot file
+#
+EFI_BOOT_FILE	= bootarm.efi
+
+# Include generic EFI Makefile
+#
+MAKEDEPS	+= Makefile.efi
+include Makefile.efi

src/arch/arm/core/arm_bigint.c

@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2016 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ *
+ * You can also choose to distribute this program under the terms of
+ * the Unmodified Binary Distribution Licence (as given in the file
+ * COPYING.UBDL), provided that you have satisfied its requirements.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#include <stdint.h>
+#include <string.h>
+#include <ipxe/bigint.h>
+
+/** @file
+ *
+ * Big integer support
+ */
+
+/**
+ * Multiply big integers
+ *
+ * @v multiplicand0	Element 0 of big integer to be multiplied
+ * @v multiplier0	Element 0 of big integer to be multiplied
+ * @v result0		Element 0 of big integer to hold result
+ * @v size		Number of elements
+ */
+void bigint_multiply_raw ( const uint32_t *multiplicand0,
+			   const uint32_t *multiplier0,
+			   uint32_t *result0, unsigned int size ) {
+	const bigint_t ( size ) __attribute__ (( may_alias )) *multiplicand =
+		( ( const void * ) multiplicand0 );
+	const bigint_t ( size ) __attribute__ (( may_alias )) *multiplier =
+		( ( const void * ) multiplier0 );
+	bigint_t ( size * 2 ) __attribute__ (( may_alias )) *result =
+		( ( void * ) result0 );
+	unsigned int i;
+	unsigned int j;
+	uint32_t multiplicand_element;
+	uint32_t multiplier_element;
+	uint32_t *result_elements;
+	uint32_t discard_low;
+	uint32_t discard_high;
+	uint32_t discard_temp;
+
+	/* Zero result */
+	memset ( result, 0, sizeof ( *result ) );
+
+	/* Multiply integers one element at a time */
+	for ( i = 0 ; i < size ; i++ ) {
+		multiplicand_element = multiplicand->element[i];
+		for ( j = 0 ; j < size ; j++ ) {
+			multiplier_element = multiplier->element[j];
+			result_elements = &result->element[ i + j ];
+			/* Perform a single multiply, and add the
+			 * resulting double-element into the result,
+			 * carrying as necessary.  The carry can
+			 * never overflow beyond the end of the
+			 * result, since:
+			 *
+			 *     a < 2^{n}, b < 2^{n} => ab < 2^{2n}
+			 */
+			__asm__ __volatile__ ( "umull %1, %2, %5, %6\n\t"
+					       "ldr %3, [%0]\n\t"
+					       "adds %3, %1\n\t"
+					       "stmia %0!, {%3}\n\t"
+					       "ldr %3, [%0]\n\t"
+					       "adcs %3, %2\n\t"
+					       "stmia %0!, {%3}\n\t"
+					       "bcc 2f\n\t"
+					       "\n1:\n\t"
+					       "ldr %3, [%0]\n\t"
+					       "adcs %3, #0\n\t"
+					       "stmia %0!, {%3}\n\t"
+					       "bcs 1b\n\t"
+					       "\n2:\n\t"
+					       : "+l" ( result_elements ),
+						 "=l" ( discard_low ),
+						 "=l" ( discard_high ),
+						 "=l" ( discard_temp ),
+						 "+m" ( *result )
+					       : "l" ( multiplicand_element ),
+						 "l" ( multiplier_element )
+					       : "cc" );
+		}
+	}
+}

src/arch/arm/core/arm_io.c

@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2016 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ *
+ * You can also choose to distribute this program under the terms of
+ * the Unmodified Binary Distribution Licence (as given in the file
+ * COPYING.UBDL), provided that you have satisfied its requirements.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#include <ipxe/io.h>
+#include <ipxe/arm_io.h>
+
+/** @file
+ *
+ * iPXE I/O API for ARM
+ *
+ */
+
+/** An ARM I/O qword */
+union arm_io_qword {
+	uint64_t qword;
+	uint32_t dword[2];
+};
+
+/**
+ * Read 64-bit qword from memory-mapped device
+ *
+ * @v io_addr		I/O address
+ * @ret data		Value read
+ *
+ * This is not atomic for ARM.
+ */
+static uint64_t arm_readq ( volatile uint64_t *io_addr ) {
+	volatile union arm_io_qword *ptr =
+		container_of ( io_addr, union arm_io_qword, qword );
+	union arm_io_qword tmp;
+
+	tmp.dword[0] = readl ( &ptr->dword[0] );
+	tmp.dword[1] = readl ( &ptr->dword[1] );
+	return tmp.qword;
+}
+
+/**
+ * Write 64-bit qword to memory-mapped device
+ *
+ * @v data		Value to write
+ * @v io_addr		I/O address
+ *
+ * This is not atomic for ARM.
+ */
+static void arm_writeq ( uint64_t data, volatile uint64_t *io_addr ) {
+	volatile union arm_io_qword *ptr =
+		container_of ( io_addr, union arm_io_qword, qword );
+	union arm_io_qword tmp;
+
+	tmp.qword = data;
+	writel ( tmp.dword[0], &ptr->dword[0] );
+	writel ( tmp.dword[1], &ptr->dword[1] );
+}
+
+PROVIDE_IOAPI_INLINE ( arm, phys_to_bus );
+PROVIDE_IOAPI_INLINE ( arm, bus_to_phys );
+PROVIDE_IOAPI_INLINE ( arm, readb );
+PROVIDE_IOAPI_INLINE ( arm, readw );
+PROVIDE_IOAPI_INLINE ( arm, readl );
+PROVIDE_IOAPI_INLINE ( arm, writeb );
+PROVIDE_IOAPI_INLINE ( arm, writew );
+PROVIDE_IOAPI_INLINE ( arm, writel );
+PROVIDE_IOAPI_INLINE ( arm, iodelay );
+PROVIDE_IOAPI_INLINE ( arm, mb );
+PROVIDE_IOAPI ( arm, readq, arm_readq );
+PROVIDE_IOAPI ( arm, writeq, arm_writeq );

src/arch/arm/core/setjmp.S

@@ -0,0 +1,32 @@
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
+
+	.text
+	.arm
+
+/*
+ * Save stack context for non-local goto
+ */
+	.globl	setjmp
+	.type	setjmp, %function
+setjmp:
+	/* Store registers */
+	stmia	r0, { r4, r5, r6, r7, r8, r9, r10, fp, sp, lr }
+	/* Return 0 when returning as setjmp() */
+	mov	r0, #0
+	bx	lr
+	.size	setjmp, . - setjmp
+
+/*
+ * Non-local jump to a saved stack context
+ */
+	.globl	longjmp
+	.type	longjmp, %function
+longjmp:
+	/* Restore registers */
+	ldmia	r0, { r4, r5, r6, r7, r8, r9, r10, fp, sp, lr }
+	/* Force result to non-zero */
+	movs	r0, r1
+	moveq	r0, #1
+	/* Return to setjmp() caller */
+	bx	lr
+	.size	longjmp, . - longjmp