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[tg3] Fix various tg3 issues
Modified-by: Michael Brown <mcb30@ipxe.org>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
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kevintuantran authored and mcb30 committed Mar 4, 2013
1 parent 77f64b1 commit e27803e
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Showing 2 changed files with 15 additions and 1 deletion.
6 changes: 6 additions & 0 deletions src/drivers/net/tg3/tg3.h
Expand Up @@ -298,6 +298,7 @@
#define ASIC_REV_57780 0x57780
#define ASIC_REV_5717 0x5717
#define ASIC_REV_57765 0x57785
#define ASIC_REV_57766 0x57766
#define ASIC_REV_5719 0x5719
#define ASIC_REV_5720 0x5720
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
Expand Down Expand Up @@ -1215,6 +1216,8 @@
#define TG3_CPMU_LNK_AWARE_PWRMD 0x00003610
#define CPMU_LNK_AWARE_MACCLK_MASK 0x001f0000
#define CPMU_LNK_AWARE_MACCLK_6_25 0x00130000

#define TG3_CPMU_D0_CLCK_POLICY 0x00003614
/* 0x3614 --> 0x361c unused */

#define TG3_CPMU_HST_ACC 0x0000361c
Expand All @@ -1225,6 +1228,9 @@
#define TG3_CPMU_CLCK_ORIDE 0x00003624
#define CPMU_CLCK_ORIDE_MAC_ORIDE_EN 0x80000000

#define TG3_CPMU_CLCK_ORIDE_EN 0x00003628
#define CPMU_CLCK_ORIDE_MAC_CLCK_ORIDE_EN 0x00002000

#define TG3_CPMU_CLCK_STAT 0x00003630
#define CPMU_CLCK_STAT_MAC_CLCK_MASK 0x001f0000
#define CPMU_CLCK_STAT_MAC_CLCK_62_5 0x00000000
Expand Down
10 changes: 9 additions & 1 deletion src/drivers/net/tg3/tg3_hw.c
Expand Up @@ -322,7 +322,7 @@ static void tg3_get_eeprom_hw_cfg(struct tg3 *tp)
}

if ((nic_cfg & NIC_SRAM_DATA_CFG_APE_ENABLE) &&
tg3_flag(tp, 5750_PLUS))
tg3_flag(tp, ENABLE_ASF))
tg3_flag_set(tp, ENABLE_APE);

if (cfg2 & (1 << 17))
Expand Down Expand Up @@ -466,6 +466,7 @@ int tg3_get_invariants(struct tg3 *tp)
tg3_flag_set(tp, 5717_PLUS);

if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57766 ||
tg3_flag(tp, 5717_PLUS))
tg3_flag_set(tp, 57765_PLUS);

Expand Down Expand Up @@ -1465,6 +1466,13 @@ static int tg3_chip_reset(struct tg3 *tp)
tw32(TG3_CPMU_CLCK_ORIDE, val & ~CPMU_CLCK_ORIDE_MAC_ORIDE_EN);
}

if (tg3_flag(tp, CPMU_PRESENT)) {
tw32(TG3_CPMU_D0_CLCK_POLICY, 0);
val = tr32(TG3_CPMU_CLCK_ORIDE_EN);
tw32(TG3_CPMU_CLCK_ORIDE_EN,
val | CPMU_CLCK_ORIDE_MAC_CLCK_ORIDE_EN);
}

return 0;
}

Expand Down

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